User Contributed MET/CAL PROCEDURE ============================================================================= INSTRUMENT: HP 6433B:DC Power Supply DATE: 05-Jun-95 AUTHOR: User Contributed REVISION: 0 ADJUSTMENT THRESHOLD: 100% NUMBER OF TESTS: 10 NUMBER OF LINES: 156 CONFIGURATION: Datron 1281 STANDARD: DTB Metered Variac STANDARD: Transistor Devices DLP 50 STANDARD: SRI-SH 20 ============================================================================= STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON 1.001 ASK+ X 1.002 ASK- P F 1.003 HEAD ÍÍ INITIAL CONDITIONS ÍÍ 1.004 DISP The following test equipment is required: 1.004 DISP 1. Metered vaiac DTB # 2-172 1.004 DISP 2. Transistor Devices DLP 50-150-3000A 1.004 DISP 3. Sensitive Research 20 Amp Shunt DTB # 14-109 1.005 DISP Set the UUT front panel controls as follows: 1.005 DISP LINE ON/OFF ........................................ OFF 1.005 DISP VOLTAGE COARSE/FINE........................... fully CCW 1.005 DISP CURRENT COARSE/FINE........................... fully CCW 1.006 DISP Remove the UUT rear panel terminal strip cover. 1.007 DISP All connections are made to the rear panel 1.007 DISP terminal strip. If not already connected, connect 1.007 DISP shorting links between the UUT + and +S output terminals 1.007 DISP and - and -S terminals. 1.008 DISP ÿ Connect the UUT and the 1281 as follows: 1.008 DISP ÿ[27][91]1m 6433B TO 1281[27][91]m 1.008 DISP ÿ OUTPUT- (+S) ÄÄÄÄÄÄÄÄÄÄÄÄ> INPUT-HIGH 1.008 DISP ÿ OUTPUT- (-S) ÄÄÄÄÄÄÄÄÄÄÄÄ> INPUT-LO 1.009 DISP Connect the Sensitive Research 50 Amp Shunt in series 1.009 DISP with the UUT and DLP 50 as follows: 1.009 DISP 1.009 DISP ÿ [27][91]1m 6433B TO SHUNT 1.009 DISP ÿ OUTPUT + ÄÄÄÄÄÄÄÄÄ> Shunt Right Terminal 1.009 DISP 1.009 DISP ÿ [27][91]1m SHUNT TO DPL 50 1.009 DISP ÿ Shunt Left Terminal ÄÄÄÄÄÄÄÄÄ> DLP 50 + Input 1.010 DISP ÿ Connect the UUT and the DLP 50 as follows: 1.010 DISP ÿ[27][91]1m 6433B TO DLP 50[27][91]m 1.010 DISP ÿ OUTPUT- (-) ÄÄÄÄÄÄÄÄÄÄÄÄ> INPUT- (-) 1.011 DISP Connect the 1281 HI and LO inputs accross the shunt 1.011 DISP as follows: 1.011 DISP ÿ [27][91]1m 1281 TO SHUNT 1.011 DISP ÿ CH A INPUT HI ÄÄÄÄÄÄÄÄÄ> RIGHT SHUNT METER TERMINAL 1.011 DISP ÿ CH A INPUT LO ÄÄÄÄÄÄÄÄÄ> LEFT SHUNT METER TERMINAL 1.012 DISP Connect UUT AC line cord to Metered Variac. 1.013 DISP Set the DLP 50 front panel controls as follows: 1.013 DISP VOLTS RANGE ........................................ 60V 1.013 DISP AMPS RANGE ......................................... 18A 1.013 DISP MODE ............................................. 0-30A 1.013 DISP DC switch .......................................... OFF 1.013 DISP LOAD ADJUST COARSE/FINE ...................... fully ccw 1.013 DISP AC ON ............................................... ON 1.014 DISP Set the variac to 115 VAC. 1.015 DISP Set the UUT POWER switch to the ON position. 1.016 HEAD {} 1.017 HEAD {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»} 1.018 HEAD {º METER ACCURACY TEST º} 1.019 HEAD {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ} 1.020 HEAD {}ÍÍ METER ACCURACY TEST ÍÍ 1.021 STD DTB Metered Variac 1.022 STD Transistor Devices DLP 50 1.023 JMP 2.001 1.024 EVAL 2.001 DISP Set the UUT front panel controls as follows: 2.001 DISP CURRENT COARSE/FINE............................ fully CW 2.002 DISP Set UUT VOLTAGE controls for a UUT reading of exactly 2.002 DISP 36 Volts. 2.003 IEEE [@1281] DCV AUTO 2.004 IEEE [@1281] [D2000]RDG?[I] 2.005 MATH MEM1 = 36.00 2.006 MEME 2.007 MEMC V 2% 0.00U 3.001 STD SRI-SH 20 3.002 DISP Set the DLP 50 front panel controls as follows: 3.002 DISP DC switch ........................................... ON 3.003 DISP Adjust DLP 50 COARSE and FINE LOAD ADJUST controls 3.003 DISP for a UUT reading of exactly 10 amps. 3.004 IEEE [@1281]INPUT CH_A 3.004 IEEE [@1281] DCV AUTO 3.005 IEEE [@1281] [D2000]RDG?[I] 3.006 MATH MEM1 = 25.00 3.007 MEM* 1000 3.008 MEME 3.009 MEMC mV 2% 0.00U 10ÿAmps 4.001 HEAD {} 4.002 HEAD {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»} 4.003 HEAD {º LOAD REGULATION TEST º} 4.004 HEAD {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ} 4.005 HEAD {}ÍÍ LOAD REGULATION TEST ÍÍ 4.006 JMP 5.001 4.007 EVAL 5.001 DISP Adjust variac for an reading of 115VAC. 5.002 IEEE [@1281] INPUT FRONT 5.003 IEEE [@1281] DCV AUTO 5.004 IEEE [@1281] [D2000]RDG?[I] 5.005 MEME 5.006 IEEE [D2000] 5.007 DISP Set the DLP 50 front panel controls as follows: 5.007 DISP DC switch .......................................... OFF 5.008 IEEE [@1281] DCV AUTO 5.009 IEEE [@1281] [D2000]RDG?[I] 5.010 MATH MEM = (MEM - MEM1) * 1000 5.011 MATH MEM1 = 0.00 5.012 MEME 5.013 MEMC mV 20.00U FULLÿtoÿNO 6.001 HEAD {} 6.002 HEAD {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»} 6.003 HEAD {º LINE REGULATION TEST º} 6.004 HEAD {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ} 6.005 HEAD {}ÍÍ LINE REGULATION TEST ÍÍ 6.006 JMP 7.001 6.007 EVAL 7.001 DISP Set the DLP 50 front panel controls as follows: 7.001 DISP DC switch ........................................... ON 7.002 DISP Set the variac to 104 VAC. 7.003 IEEE [@1281] DCV AUTO 7.004 IEEE [@1281] [D2000]RDG?[I] 7.005 MEME 7.006 DISP Set the variac to 127 VAC. 7.007 IEEE [@1281] DCV AUTO 7.008 IEEE [@1281] [D2000]RDG?[I] 7.009 MATH MEM = (MEM - MEM1) * 1000 7.010 MATH MEM1 = 0.00 7.011 MEME 7.012 MEMC mV 10.00U 104ÿtoÿ127VAC 8.001 DISP Set the variac to 115 VAC. 8.002 HEAD {} 8.003 HEAD {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»} 8.004 HEAD {º RIPPLE AND NOISE TEST º} 8.005 HEAD {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ} 8.006 HEAD {}ÍÍ RIPPLE AND NOISE TEST ÍÍ 8.007 JMP 9.001 8.008 EVAL 9.001 IEEE [@1281]ACV AUTO 9.002 IEEE [@1281]RDG?[I][D2000]RDG?[I] 9.003 MEM* 1000 9.004 MATH MEM1 = 0.00 9.005 MEME 9.006 MEMC mVRMS 32.00U 10.001 HEAD 10.002 DISP Set the DLP 50 front panel controls as follows: 10.002 DISP DC switch .......................................... OFF 10.003 DISP Set the UUT front panel controls as follows: 10.003 DISP LINE ON/OFF ........................................ OFF 10.004 HEAD {} 10.005 DISP {ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»} 10.005 DISP {º THIS COMPLETES THE VERIFICATION º} 10.005 DISP {ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ} 10.006 END